2 #include <avr/interrupt.h>
3 #include <util/delay.h>
7 static uint16_t pwm[N_PWMLEDS];
8 static volatile unsigned char step;
10 static void enable_pll()
15 /* Synchronize to the phase lock */
17 while ((PLLCSR & _BV(PLOCK)) == 0)
28 for (i = 0; i < N_PWMLEDS; i++)
33 // PWM channel D is inverted, ...
34 TCCR1C = _BV(COM1D1) | _BV(COM1D0) | _BV(PWM1D);
35 // PWM channels A and B are not
36 TCCR1A = _BV(COM1A1) | _BV(COM1B1) | _BV(PWM1A) | _BV(PWM1B);
38 TCCR1B = _BV(CS10); // no clock prescaling
41 OCR1C = PWM_MAX & 0xFF; // TOP value
43 TC1H = PWM_MAX >> 8; // PWM3 is inverted
44 OCR1D = PWM_MAX & 0xFF;
47 OCR1B = OCR1A = 0; // initial stride is 0
49 DDRB &= ~(_BV( PB1 ) | _BV( PB3 ) | _BV( PB5 )); // tristate it
50 PORTB &= ~(_BV( PB1 ) | _BV( PB3 ) | _BV( PB5 )); // set to zero
57 for (i = 0; i < N_PWMLEDS; i++)
60 DDRB &= ~(_BV( PB1 ) | _BV( PB3 ) | _BV( PB5 ));
61 TCCR1D = TCCR1C = TCCR1B = TCCR1A = 0;
65 PLLCSR &= ~(_BV(PLLE) | _BV(PCKE));
68 void pwm_off(unsigned char n)
73 case 0: DDRB &= ~_BV(PB1); break;
74 case 1: DDRB &= ~_BV(PB3); break;
75 case 2: DDRB &= ~_BV(PB5); break;
79 static void pwm_update_hw(unsigned char n)
82 uint16_t stride = (pwm[n] + step) >> PWM_STEP_SHIFT;
85 stride = PWM_MAX - stride;
109 void pwm_set(unsigned char n, uint16_t stride)
111 if (((stride + (1 << PWM_STEP_SHIFT)) >> PWM_STEP_SHIFT) >= PWM_MAX)
112 stride = PWM_MAX << PWM_STEP_SHIFT;
122 if (++step >= (1 << PWM_STEP_SHIFT))
125 for (i = 0; i < N_PWMLEDS; i++)
131 static void inline pwm_handler()
136 TIMSK &= ~_BV(TOIE1);