* Counts from 0 to 0xFF, without OCR1C compare.
*/
-static unsigned char pwm_enabled;
+volatile unsigned char pwm_enabled;
static void inline enable_pll()
{
DDRB &= ~_BV(PB4);
PLLCSR &= ~(_BV(PLLE) | _BV(PCKE));
+ power_timer1_disable();
pwm_enabled = 0;
}
OCR1B = stride;
if (!pwm_enabled) {
+ power_timer1_enable();
enable_pll();
DDRB |= _BV(PB4);
pwm_enabled = 1;